5 Gpu Architecture Jobs

As a senior engineer at NVIDIA, you will be at the forefront of groundbreaking developments in High-Performance Computing, Artificial Intelligence, and Visualization. Your role will involve understanding, analyzing, profiling, and optimizing deep learning workloads on cutting-edge hardware and software platforms. You will collaborate with cross-functional teams to enhance cloud application performance on diverse GPU architectures and identify bottlenecks for optimization. Your responsibilities will include building tools to automate workload analysis, optimization, and other critical workflows. You will drive platform optimization from hardware to application levels and design performance benchmarks to evaluate application efficiency. Your expertise in deep learning model architectures, Pytorch, and large-scale distributed training will be essential in proposing optimizations to enhance GPU utilization. To excel in this role, you should hold a Masters in CS, EE, or CSEE, or possess equivalent experience with at least 5 years in application performance engineering. Experience with large-scale multi-node GPU infrastructure, application profiling tools, and a deep understanding of computer architecture is required. Proficiency in Python and C/C++ for analyzing and optimizing application code is also crucial. Standing out from the crowd can be achieved through strong fundamentals in algorithms, GPU programming experience, and hands-on experience in performance optimization on distributed systems. An understanding of NVIDIA's server and software ecosystem, coupled with expertise in storage systems, Linux file systems, and RDMA networking will set you apart. Join NVIDIA, a leading technology company driving the AI revolution, and play a direct role in shaping the hardware and software roadmap while impacting deep learning users globally. If you are a creative and autonomous individual who is unafraid to push the boundaries of performance analysis and optimization, we invite you to be part of our innovative team. JR1986479,

As a senior engineer at NVIDIA, you will play a crucial role in the optimization of deep learning workloads on cutting-edge hardware and software platforms. Your primary responsibility will be to understand, analyze, and profile these workloads to achieve peak performance. By building automated tools for workload analysis and optimization, you will contribute to enhancing the efficiency of GPU utilization and cloud application performance across diverse GPU architectures. Collaboration with cross-functional teams will be essential as you identify bottlenecks and inefficiencies in application code, proposing optimizations to drive end-to-end platform optimization. Your role will involve designing and implementing performance benchmarks and testing methodologies to evaluate application performance accurately. To qualify for this role, you should hold a Master's degree in CS, EE, or CSEE, or possess equivalent experience. With at least 5 years of experience in application performance engineering, you are expected to have a background in deep learning model architectures, proficiency in tools such as NVIDIA NSight and Intel VTune, and a deep understanding of computer architecture and GPU fundamentals. Proficiency in Python and C/C++ will be essential for analyzing and optimizing application code effectively. To stand out from the crowd, strong fundamentals in algorithms and GPU programming experience (CUDA or OpenCL) will be highly beneficial. Hands-on experience in performance optimization and benchmarking on large-scale distributed systems, familiarity with NVIDIA's server and software ecosystem, and expertise in storage systems, Linux file systems, and RDMA networking will further distinguish you as a top candidate. Joining NVIDIA means being part of a dynamic team that leads the AI revolution, offering you the opportunity to directly impact the hardware and software roadmap in a fast-growing technology company. If you are unafraid to tackle challenges across the hardware/software stack and are passionate about achieving peak performance in deep learning workloads, we want to hear from you.,

Manager, Algorithm Engineering KLA is seeking a Manager, Algorithm Engineering to lead and mentor a team focused on designing and implementing robust and scalable algorithmic solutions. This pivotal role involves developing and maintaining the infrastructure for algorithm deployment at scale , optimizing performance, and driving continuous improvement in our systems. Responsibilities Lead and mentor a team of algorithm engineers , providing guidance and support to ensure their professional growth and success. Develop and maintain the infrastructure required for the deployment and execution of algorithms at scale. Collaborate with data scientists, software engineers, and product managers to design and implement robust and scalable algorithmic solutions. Optimize algorithm performance and resource utilization to meet business objectives. Stay up-to-date with the latest advancements in algorithm engineering and infrastructure technologies, and apply them to improve our systems. Drive continuous improvement in development processes, tools, and methodologies. Skills Proven experience in developing computer vision and image processing algorithms and ML/DL algorithms. Familiarity with high-performance computing, parallel programming, and distributed systems. Strong leadership and team management skills , with a track record of successfully leading engineering teams. Proficiency in programming languages such as Python, C++ and CUDA. Excellent problem-solving and analytical skills. Strong communication and collaboration abilities. Experience with machine learning frameworks and libraries (e.g., TensorFlow, PyTorch, Scikit-learn) (Preferred). Experience with GPU architecture and algorithm development toolkits like Docker, Apptainer (Preferred). Qualifications Bachelor's or Master's degree in Computer Science, Engineering, or a related field.

Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum (must haves) Bachelor's degree in electrical engineering or computer engineering with 3 to 12 years of experience or a master's degree in electrical engineering or computer engineering. 6+ years of experience in 5 or more of the following: Test Bench bring-up at SoC and strong programming skills in System Verilog, OVM and UVM. Test Plan development experience. Enabling regressions, maintaining QoV (quality of validation) with good functional/code/other coverage metrics. Familiarity with both simulation and emulation environments. Strong CPU/GPU architecture understanding. RTL Debugging module level or soc level system simulation failures. Building emulation models, enabling content. Working with Validation Engineers and central CAD teams to support and maintain verification requirements in terms of Automation and tool flow support. Coordinating with Val team on CAD Requirement with support CAD, IT and Engineering Compute Teams. Act as focal point between design and tool vendors for issues and feature enhancements. Training/Supporting Validation Engineers in CAD tool flow and Infrastructure Monitoring and improve existing simulation environments and simulation efficiency. Experience with Performance Validation of GPUs and automation framework using Python is desirable

Exposure to Emulation model build and sanity bring-up Proven Emulation Testbench bring-up experience with C++ and SystemVerilog BFM models Expertise in porting C++/SystemVerilog Simulation Testbenches to Emulation Hands-on experience with SystemVerilog, C++ based testbenches BFM coding using C++ or SystemVerilog Strong Python scripting skills Exposure to GPU emulation model build and sanity bring-up Good understanding of GPU architecture Strong functional verification expertise