Design and Verification Engineer

5 - 10 years

6 - 9 Lacs

Posted:3 days ago| Platform: Naukri logo

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Work Mode

Work from Office

Job Type

Full Time

Job Description

Design Verification Engineers

verification

Key Skills Required:

  • SystemVerilog (SV)

  • UVM (Universal Verification Methodology)

  • SoC/IP Level Verification
  • GLS (Gate-Level Simulation)
  • CPU/Sub-system Verification
  • High-speed interface protocols:

    PCIe, DDR, Ethernet

Requirements:

  • Immediate to 30 days joiners only
  • Willing to work from office (Bengaluru or Hyderabad)
  • Strong debugging and problem-solving skills
  • Excellent communication and team collaboration abilities

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