5 Verilog-A Modeling Jobs

Review SerDes standards to define analog sub-block specifications Architect and refine circuits for optimal power, area, and performance Propose and implement verification strategies using advanced simulator features Supervise physical layout to manage parasitics, stress, and process variations Present simulation results to peers and customers for validation Document design methodologies, test plans, and circuit features Provide electrical characterization guidance and suggest post-silicon updates The Impact You Will Have: Innovate in high-speed analog IC design for next-gen SerDes IP Ensure efficient, reliable analog designs meeting stringent specs Influence architectural strategies and best practices in analog design Enable successful integration of analog blocks into customer systems Strengthen the R&D team through knowledge sharing and technical leadership Drive product performance and power efficiency across SerDes solutions What You'll Need: BE with 8+ years or MTech with 6+ years of experience in Electrical/Computer Engineering Strong expertise in transistor-level CMOS analog design Design experience with one or more SerDes sub-circuits (e.g., PLL, RX, TX) Awareness of ESD design strategies and reliability (EM, IR, aging) Familiarity with custom digital logic and high-speed paths Proficiency in SPICE simulation, schematic/layout tools, and design verification Experience with Verilog-A modeling and scripting (TCL, Perl, Python, MATLAB)

Review SerDes standards to develop analog sub-block design specifications Define and refine circuit architectures to meet power, area, and performance goals Devise design and verification strategies leveraging advanced simulation tools Supervise physical layout to manage parasitics, device stress, and variability Present simulation data for internal and customer-facing reviews Document design methodologies, features, and test strategies Support electrical characterization and propose post-silicon design updates The Impact You Will Have: Drive innovation in high-speed analog circuit design for SerDes IP Ensure optimal trade-offs in power, area, and performance Enhance reliability and manufacturability of analog sub-blocks Support successful integration of SerDes IP into customer solutions Contribute to best practices in analog design and simulation within the team Influence product development strategies with expert design knowledge What You'll Need: BE with 8+ years or MTech with 6+ years of relevant experience in Electrical/Computer Engineering Strong expertise in transistor-level CMOS circuit design and analog design fundamentals Experience in designing SerDes sub-circuits like PLLs, TX, RX, CDR, etc. Understanding of ESD protection, custom digital design, and high-speed logic Familiarity with reliability concerns such as EM, IR drop, and aging Proficient with schematic/layout tools and SPICE-based simulators Knowledge of Verilog-A for behavioral modeling and scripting in TCL, Perl, Python, or MATLAB

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a highly skilled and experienced Analog Design Engineer with a passion for developing cutting-edge technology With a strong foundation in Electrical or Computer Engineering, you have honed your expertise in transistor-level circuit design and are adept at working with high-speed analog integrated circuits Your deep understanding of CMOS design fundamentals and familiarity with various SerDes sub-circuits make you an invaluable asset to any team You thrive in collaborative environments, working seamlessly with cross-functional teams of analog and digital designers Your meticulous approach ensures optimal power, area, and performance targets are met, and your innovative design strategies push the boundaries of what is possible You are not only technically proficient but also possess excellent communication and documentation skills, allowing you to effectively share your ideas and results with peers and customers Your proactive attitude and problem-solving abilities make you a go-to person for post-silicon design updates and electrical characterization In summary, you are a seasoned professional ready to take on the challenges of high-speed analog integrated circuit design in the latest FinFET process nodes, What Youll Be Doing: Review SerDes standards to develop analog sub-block specifications, Identify and refine circuit architectures to achieve optimal power, area, and performance targets, Propose design and verification strategies that efficiently use simulator features to ensure the highest quality design, Oversee physical layout to minimize the effect of parasitics, device stress, and process variation, Present simulation data for peer and customer review, Document design features and test plans, Consult on the electrical characterization of your circuit within the SerDes IP product, Propose solutions for post-silicon design updates, The Impact You Will Have: Drive innovation in high-speed analog integrated circuit design, Ensure optimal performance, power efficiency, and area utilization of our products, Contribute to the development of industry-leading SerDes IP, Enhance the reliability and quality of our analog sub-blocks, Support the successful integration of SerDes IP into customer products, Foster collaboration and knowledge sharing within the R&D team, Influence design strategies and best practices within the organization, What Youll Need: BE with 8+ years of relevant experience or MTech with 6+ years of relevant experience in Electrical Engineering or Computer Engineering, In-depth familiarity with transistor-level circuit design and sound CMOS design fundamentals, Detailed design experience with at least one, and familiarity with several other SerDes sub-circuits, Awareness of ESD issues and circuit techniques for addressing them, Familiarity with custom digital design and high-speed logic paths, Knowledge of design for reliability, including EM, IR, and aging considerations, Experience with tools for schematic entry, physical layout, and design verification, Hands-on experience with physical layout of high-speed circuits is a plus, Proficiency with SPICE simulators and simulation methods, Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture, Experience with scripting languages such as TCL, Perl, C, Python, or MATLAB is desired, Who You Are: Collaborative and able to work effectively in a team environment, Detail-oriented with a strong focus on quality and reliability, Proactive problem-solver with innovative design strategies, Excellent communicator with strong documentation skills, Adaptable and able to thrive in a fast-paced, dynamic environment, The Team Youll Be A Part Of: You will be part of a fast-growing analog and mixed-signal R&D team dedicated to developing high-speed analog integrated circuits in the latest FinFET process nodes Our team is composed of talented analog and digital designers from diverse backgrounds, working collaboratively to push the boundaries of technology We leverage a full suite of IC design tools, supplemented by custom, in-house tools supported by an experienced software/CAD team, to create industry-leading SerDes IP, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

Review SerDes standards to develop analog sub-block specifications. Identify and refine circuit architectures to achieve optimal power, area, and performance targets. Propose design and verification strategies that efficiently use simulator features to ensure the highest quality design. Oversee physical layout to minimize the effect of parasitics, device stress, and process variation. Present simulation data for peer and customer review. Document design features and test plans. Consult on the electrical characterization of your circuit within the SerDes IP product. Propose solutions for post-silicon design updates. The Impact You Will Have:Drive innovation in high-speed analog integrated circuit design. Ensure optimal performance, power efficiency, and area utilization of our products. Contribute to the development of industry-leading SerDes IP. Enhance the reliability and quality of our analog sub-blocks. Support the successful integration of SerDes IP into customer products. Foster collaboration and knowledge sharing within the R&D team. Influence design strategies and best practices within the organization. What You ll Need:BE with 8+ years of relevant experience or MTech with 6+ years of relevant experience in Electrical Engineering or Computer Engineering. In-depth familiarity with transistor-level circuit design and sound CMOS design fundamentals. Detailed design experience with at least one, and familiarity with several other SerDes sub-circuits. Awareness of ESD issues and circuit techniques for addressing them. Familiarity with custom digital design and high-speed logic paths. Knowledge of design for reliability, including EM, IR, and aging considerations. Experience with tools for schematic entry, physical layout, and design verification. Hands-on experience with physical layout of high-speed circuits is a plus. Proficiency with SPICE simulators and simulation methods. Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control / data-capture. Experience with scripting languages such as TCL, Perl, C, Python, or MATLAB is desired. Who You Are:Collaborative and able to work effectively in a team environment. Detail-oriented with a strong focus on quality and reliability. Proactive problem-solver with innovative design strategies. Excellent communicator with strong documentation skills. Adaptable and able to thrive in a fast-paced, dynamic environment.

Your Job: The role requires a strong background in semiconductor device physics. The candidate should be familiar with the electrical behaviors of semiconductor devices (DC/low frequency, RF/high frequency, noise, mismatch, etc.), and the types of test structures that are needed to characterize them. The candidate should be able to apply his/her knowledge of semiconductor device physics in a practical compact model extraction scenario, such as being able to analyze and explain the trends in the data, being able to distinguish real trends from noise , associate various physical phenomena with the observed trends, submit electrical characterization requests, extract various compact modeling parameters, do various QA checks and submit the model for release. The candidate should also be able to do design and layout of test structures; be able to correlate device cross section with layout; do various kinds of simulations in Cadence ADE; be proficient in writing python scripts for doing model parameter extraction, data analysis and QA; have knowledge of industry standard compact model families and parameter extraction tools/methodologies; have knowledge of Verilog-A and be able to write Verilog-A models; and be able to field customer queries pertaining the model. Other Responsibilities: Apart from strong technical skills, the candidate should also possess excellent communication skills and be able to work across geographies and time zones. He/She should be self-driven and self-motivated to excel, innovate and solve problems. This position is based out of Bangalore. Required Qualifications: Education: Masters/PhD in the domain of semiconductor devices Years of Experience : NA Background in programming languages like pyhton/perl/verilof strongly preferred