4 Verilog A Jobs

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8.0 - 13.0 years

40 - 60 Lacs

noida, ahmedabad, bengaluru

Work from Office

Exp: 4-15yrs Location: Bangalore/Hyderabad/Noida/Ahmedabad Lead the planning, development, and execution of AMS verification strategies for analog/mixed-signal IPs and SoCs. Define and implement verification plans, including testbenches, stimulus generation, and checking strategies. Develop and maintain SystemVerilog, Verilog-AMS, or UVM-based verification environments. Perform co-simulation of analog/digital designs using industry tools (e.g., Cadence, Synopsys, Siemens EDA). Conduct mixed-signal simulations, behavioral modeling of analog blocks, and integration into top-level environments. Collaborate with analog designers to create AMS behavioral models (e.g., Verilog-A/AMS) for early int...

Posted 2 weeks ago

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4.0 - 9.0 years

2 - 9 Lacs

bengaluru, karnataka, india

Remote

The candidate should be able to Apply his/her knowledge of semiconductor device physics in a practical compact model extraction scenario; Analyze and explain the trends in the data, distinguish real trends from noise ; Associate various physical phenomena with the observed trends; Submit electrical characterization requests; Extract various compact modeling parameters; Do QA checks and submit the model for release. The candidate should also be familiar with Simulations in Cadence ADE; Perl / Shell / python scripting ; Industry standard compact model families and parameter extraction tools/methodologies; and Verilog-A programming Apart from strong technical skills, the candidate should also p...

Posted 2 months ago

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1.0 - 2.0 years

3 - 4 Lacs

hyderabad

Work from Office

Conduct classroom and online training sessions on VLSI design and verification. Teach HDL languages (Verilog, VHDL, SystemVerilog) and ASIC/FPGA design flows. Send Resume to : kalyangalactix@gmail.com Call : 7993047034 Provident fund

Posted 2 months ago

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4.0 - 8.0 years

14 - 24 Lacs

Bengaluru

Work from Office

Roles and Responsibilities Design verification using System Verilog, UVM, and SV/UVM methodologies. Experience with PrimeSim XA, WREAL, RNM, Verilog-A, and MIPI protocols. Proficiency in PCIe and USB 3 interfaces. Strong understanding of digital logic design principles and SoC architecture. Excellent problem-solving skills with attention to detail.

Posted 5 months ago

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