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RTL Verification Canvendor

5.0 - 9.0 years

0 Lacs

hyderabad, telangana

On-site

Role Overview: You will be responsible for RTL verification and developing SV/UVM testbenches at Top/Sub-system/Block-levels. Your role will involve driving test plan and test spec development, executing tests, and generating relevant documents. Additionally, you will contribute to verification environment architecture and methodology development. The position requires experience in System Verilog, UVM programming, and verification of protocols like Ethernet, PCIe, SPI, I2C, and USB. Strong debugging skills, familiarity with Xilinx technology, FPGA verification, and scripting languages like Perl, Python, or TCL are also essential for this role. Key Responsibilities: - Develop SV/UVM testbenc...

Posted 1 month ago

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