Process Engineer

Location: TATA Semiconductor Assembly and Test, Jagiroad, India

Position Overview:

As a Process Engineer in an OSAT environment, you will play a pivotal role in developing, optimizing, and sustaining semiconductor packaging processes. You will be responsible for wire bonding, flip chip assembly, and integrated system packaging technologies, supporting both high-volume production and new product introductions (NPI). This role demands a strong technical foundation, hands-on experience with packaging equipment, and the ability to collaborate across cross-functional teams including R&D, quality, and customer engineering.

Key Responsibilities:

1. Process Development & Optimization

• Design and implement robust packaging processes including:
• Wire bonding (ball/wedge bonding, fine pitch, multi-row)
• Flip chip (underfill, reflow, thermal compression bonding)
• Integrated system packaging
• Conduct DOE (Design of Experiments) to optimize process parameters for yield, reliability, and throughput.
• Develop and maintain process documentation: SOPs, control plans, FMEAs, build sheets etc.

2. Manufacturing Support

• Provide real-time support to production lines to resolve process-related issues.
• Monitor process KPIs such as yield, cycle time, defect rates, and equipment uptime.
• Lead root cause analysis and implement corrective actions for maverick lots and customer returns.

3. New Product Introduction (NPI)

• Collaborate with customer engineering and R&D teams to transfer new products from prototype to mass production.
• Define tooling and equipment requirements for new packages.
• Execute qualification plans including reliability testing.

4. Equipment & Tooling Management

• Work with equipment vendors to install, calibrate, and maintain packaging tools (e.g., wire bonders, flip chip bonder, molding machines, etc.).
• Drive automation and process standardization across multiple product lines.

5. Quality & Compliance

• Ensure compliance with customer-specific requirements, JEDEC standards, and internal quality systems.
• Support internal and external audits (ISO, customer audits, etc..).
• Implement SPC and GR&R to monitor and control process stability.

Qualifications:

• Bachelor’s or Master’s degree in Electronics, Mechanical, Materials Science, or related field.
• 5–10 years of experience in semiconductor packaging, preferably in an OSAT environment.
• Hands-on experience with wire bonding, flip chip, and SiP technologies.
• Proficiency in statistical tools (Minitab, JMP), SPC, and Six Sigma methodologies.
• Strong analytical and problem-solving skills.
• Excellent communication skills; ability to work in a multicultural, fast-paced environment.

Preferred Skills:

• Experience with QFN, BGA, WLCSP, and other packages.
• Familiarity with substrate design, thermal modeling, and mechanical stress analysis.
• Knowledge of cleanroom protocols, ESD handling.