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3.0 - 7.0 years
0 Lacs
karnataka
On-site
Role Overview: You will be responsible for developing custom layout design of analog blocks, complex digital, mixed signal blocks, standard cell libraries, or memory compilers. Your tasks will include performing detailed physical array planning, area optimization, digital block synthesis, critical wire analysis, custom leaf cell layout, and compiler assembly coding. Additionally, you will conduct complete layout verification, ensuring design rule compliance, SoC integration specs, electron migration, voltage drop (IR), selfheat, ESD, and other reliability checks. You will use custom autorouters and custom placers to efficiently construct layout. Your role will also involve providing feedback...
Posted 1 week ago
2.0 - 6.0 years
0 Lacs
karnataka
On-site
You are seeking a Digital/Memory Mask Design Engineer to join a dynamic team managing complex high-speed digital memory circuit designs at NVIDIA. As a part of the team, you will be involved in reinventing the field of artificial intelligence and enhancing human creativity and intelligence. You will work in a diverse and supportive environment where delivering your best work is encouraged. Your responsibilities will include: - Executing IC layout for innovative, high-performance, high-speed CMOS integrated circuits in foundry CMOS process nodes of 3nm, 5nm, 7nm, and lower nodes using industry-standard methodologies. - Leading the architecture and layout design of critical memory subsystems, ...
Posted 2 weeks ago
6.0 - 15.0 years
0 Lacs
Bengaluru, Karnataka, India
On-site
Company Description SILCOSYS Solutions collaborates with clients to develop next-generation flagship products, including mobile devices, routers, consumer goods, storage solutions, microprocessors, and graphics processors. We are known for pioneering cutting-edge technologies that are both pivotal and rare in the industry. With expertise in crafting intricate SoCs, SILCOSYS Solutions also boasts one of the industry&aposs most robust analog/mixed signal and software design teams. Position: Senior Memory Layout Engineer Experience: 6 - 15 Years Location: Bangalore Notice Period: 0 - 15 Days Role Description Looking for experts in memory compilers with solid hands-on experience in SRAM, ROM, TC...
Posted 2 months ago
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