6.0 - 10.0 years

0 Lacs

karnataka

On-site

As a member of the Cisco SiliconOne team, you will play a crucial role in crafting Cisco's groundbreaking Enterprise and Service Provider solutions by working on complex chips for various aspects of systems and applications. You will have the opportunity to work on Silicon, Hardware, Software, telemetry, security, and more, gaining exposure to all facets of the development process. The team offers a unique blend of a startup culture within the framework of a top-tier networking company. **Key Responsibilities:** - Utilize your ASIC design expertise to contribute to the development cycle from specification to tape-out and lab validation - Demonstrate proficiency in RTL design, including archi...

Posted 3 days ago

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Sr R&D Engineer (EDA Software) Synopsys Inc

0.0 years

0 Lacs

bengaluru, karnataka, india

On-site

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. As the #1 provider of Electronic Design Automation (EDA) solutions, Synopsys is the market leader in Hardware-Assisted Verification (HAV), accelerating the logic simulation of complex systems. Our Bangalore R&D center is a hub of talented engineers pushing the boundaries of HAV for ever-in...

Posted 4 days ago

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Synthesis + STA Engineer (SI80FF RM 3488) Sourceright Technologies

8.0 - 13.0 years

6 - 8 Lacs

bengaluru, karnataka, india

On-site

Strong understanding of timing closure for multi-clock, high-frequency timing, congestion, crosstalk, and area-sensitive designs. Collaborate with RTL designers for constraint development and cleanup. Proficient in Synopsys/Cadence tools with hands-on experience in advance features of Design compiler and PrimeTime SI. Deep expertise in low-power design (UPF/CPF), clock gating, logic optimization, and integration of high-speed interfaces like DDR and PCIe Provide technical leadership to successful tape outs at advanced technology nodes (7nm, 5nm and 3nm). Good scripting, communication and debugging skills.

Posted 2 months ago

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FPGA Engineer Talent Corner Hr Services

1.0 - 3.0 years

3 - 4 Lacs

Bengaluru

Hybrid

We are hiring an FPGA Engineer with experience in RTL design, timing closure, and logic optimization on Xilinx/Intel FPGAs to work on digital signal processing solutions in a collaborative, multidisciplinary engineering environment.

Posted 5 months ago

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