9 Functional Validation Jobs

As a candidate for this position, you should hold a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or possess equivalent practical experience. Additionally, you should have at least 5 years of experience in High Bandwidth Memory/Double Data Rate (HBM/DDR) technology. Your responsibilities will include silicon bringup, functional validation, characterizing, and qualification, as well as working with board schematics, layout, and debug methodologies utilizing lab equipment. Preferred qualifications for this role include experience in hardware emulation with hardware/software integration, proficiency in coding languages such as Python for automation development, and experience in Register-Transfer Level (RTL) design, verification, or emulation. Knowledge of SoC architecture, boot flows, and HBM/DDR standards will be advantageous. In this role, you will contribute to shaping the future of AI/ML hardware acceleration by working on cutting-edge TPU (Tensor Processing Unit) technology that powers Google's AI/ML applications. You will be part of a team dedicated to developing custom silicon solutions for Google's TPUs, with a focus on design and verification expertise related to TPU architecture and AI/ML-driven systems. Your primary responsibility will be the post-silicon validation of Cloud Tensor Processing Unit (TPU) projects. This will involve creating test plans and content for subsystem testing, verifying content on pre-silicon platforms, executing tests on post-silicon platforms, and debugging issues. Collaboration with engineers from various teams will be essential in validating functional, power, performance, and electrical characteristics of the Cloud TPU silicon to ensure high-quality designs for next-generation data center accelerators. The ML, Systems, & Cloud AI (MSCA) organization at Google is involved in designing, implementing, and managing hardware, software, machine learning, and systems infrastructure for Google services and Google Cloud. Your work will impact millions of users worldwide by prioritizing security, efficiency, and reliability in developing TPUs and running a global network. Your responsibilities will include developing and executing tests for memory controller High Bandwidth Memory (HBM) post-silicon validation, driving debugging efforts, ensuring validation coverage, and assisting in pre-silicon integration and validation on hardware emulators.,

Minimum qualifications: You should have a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. Also, a minimum of 3 years of experience in high-speed I/O validation, focusing on USB PHY electrical characterisation and compliance testing is required. Additionally, proficiency in scripting for test automation and data analysis using Python is necessary. Preferred qualifications: Ideally, you should hold a Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with a specialization in computer architecture. Previous experience in bench level IP bring-up, debugging, functional validation, characterisation, developing Bare metal bench tests, and providing manufacturing support is preferred. Proficiency in Schematic/Layout reading, Board level hardware debug is advantageous. Knowledge of USB Power Delivery electrical requirements and Type-C alternate modes such as DisplayPort over USB-C is a plus. It is desirable to have the ability to debug complex hardware and signal integrity issues at the electrical level. About the job: Join a dynamic team dedicated to pushing boundaries and creating custom silicon solutions that power Google's direct-to-consumer products. You will be instrumental in shaping innovative products that are loved by millions globally. Your expertise will contribute to the next generation of hardware experiences, ensuring unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. The team combines Google AI, Software, and Hardware to deliver radically helpful experiences through research, design, and development of cutting-edge technologies and hardware. Responsibilities: Collaborate with pre and post-silicon teams to develop, simulate, and validate goal tests, and provide comprehensive documentation of pre and post-silicon validation tests for ease of use. Work closely with internal cross-functional teams, external silicon partners, and intellectual property (IP) vendors to functionally validate and parametrically characterize the silicon, including bare-metal, kernel, drivers, and real-time operating system (RTOS). Take ownership of bench level design validation and characterisation for High-Speed Serial Interfaces (e.g., USB3.2, USB-DP, PCIe, etc.) to design Google's future products. Develop IP specific Signal Integrity, Power Integrity, and Protocol validation test cases to assess IP performance under various operating conditions (voltage, process, temperature). Enhance efficiency and test coverage by automating test cases using scripting languages like Python or Perl.,

Role: PMIC Driver development Experience: 8+ Years Location: Hyderabad Notice Period: Immediate to 15 Days Job Description: Good understanding of PMIC, Power Electronics , digital & embedded electronics concepts Good Hardware Debug Skills related to DC -DC (SMPS, LDO) converters preferred. Good programming skills in at least one of the following: C, Perl, LabVIEW or any other scripting language (used in VLSI/Embedded Domain) + understanding of few OOPS concepts. Familiarity with HW schematics and ability to trace inter connections on a PCB. Good analytical & communication (verbal/written) skills. Ability to seek information pro-actively, understand priorities and juggle multiple tasks in a highly paced environment. Experience in automating test-cases via SW-control for HW-systems Ability to come up with a High-Level Strategy for any objective and being able to break it into Mid-level flows & Low-level tasks for efficient execution. Prior experience in leading & executing white-box validation efforts of a HW-module or sub-module, is a big plus. Experience with Power management framework in LInux/Windows/RTOS enviroment. Exposure to Assembly-language programming (for microcontroller) is good-to-have. Exposure to tools like JIRA and GIT are a plus.

If you're interested in computer graphics and working with leading graphics validation engineers on Intel's latest GPU architecture, then our GPU Hardware IP (GHI) has an opportunity for you. In this position, you will be playing a key role in the pre-silicon validation of Intel's leading-edge graphics IP. As a candidate, you will build emulation/fpga prototyping platforms, develop efficient verification methodologies, execute to the validation plan, and debug issues seen during validation. You will define, develop, and perform functional validation for GPUs, focusing on the interaction of GPUs, media, display, and system-level features. Using various hardware and software tools and techniques, you will ensure validation coverage and that performance, power, and area goals are met. Additionally, you will review proposed design changes to assess their impact on validation plans, tasks, and timelines. Collaborating with other engineers, you will develop GPU validation methodologies, execute validation plans, optimize designs, troubleshoot, and perform failure analysis. Silicon debug will be a part of your responsibilities to identify root causes and resolve functional and triage failures for GPU issues. Your tasks will involve testing interactions between various GPU features using validation infrastructure, developing pre-silicon validation infrastructure, and creating a test environment for validation testing. Furthermore, you will publish GPU validation reports summarizing all validation activities performed, review results, and communicate them to relevant teams. Additionally, you will work with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for graphics interfaces to meet desired product specifications. The ideal candidate will exhibit analytical skills and possess a Bachelor's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or related STEM degree with 3+ years of industry experience, or a Master's Degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or related STEM degree with 1+ years of industry experience. Knowledge of Computer Architecture, Microarchitecture Fundamentals, functional testing, pre-silicon validation techniques, tools, simulation, debug/troubleshooting, Zebu emulation, fpga prototyping, acceleration platforms, software programming in C/C++, and automation/scripting are required qualifications. Preferred qualifications include a deep understanding of HW/FW flows, experience and hands-on skills with LTB, ITP, Logic Analyzers, Oscilloscopes, Scan dumps, and in-circuit Emulators. This is an Experienced Hire job type with Shift 1 (India) as the primary location in India, Bangalore, under the Client Computing Group (CCG) responsible for driving business strategy and product development for Intel's PC products and platforms.,

Roles and Responsibilities Design, develop, and execute comprehensive test plans for AEM applications. Collaborate with cross-functional teams to identify defects and implement fixes. Develop and maintain detailed test cases using Confluence. Perform functional validation, UI validation, analytics analysis, and DAM management. Utilize JIRA to track issues and manage project progress. AEM authoring, DAM, JIRA, Confluence, Test cases creation, Functional validation, UI validation, Analytics, AEM forms like signup, registration flows

Role & responsibilities Functional Validation Automation Cyber security Networking

Role & responsibilities Functional Validation Automation Cyber security Networking

Designing and verifying digital and mixed-signal circuits for NRZ and PAM-based SerDes products. Collaborating with a team of experienced engineers to deliver high-performance mixed-signal designs. Developing and executing structured firmware development, verification, and documentation processes. Performing functional and performance tests on prototype test-chips. Communicating effectively with different design groups and customer support teams. Balancing good design quality while meeting tight deadlines. The Impact You Will Have:Contributing to the development of cutting-edge SerDes products that drive the innovations of tomorrow. Ensuring high-performance and reliable mixed-signal designs that meet unique performance, power, and size requirements. Accelerating the integration of more capabilities into an SoC, helping customers bring differentiated products to market quickly with reduced risk. Enhancing Synopsys reputation as a leader in chip design and software security. Driving the success of our Silicon IP business by delivering high-quality mixed-signal designs. Playing a key role in the continuous technological innovation at Synopsys. What You ll Need:BSEE or MSEE plus a minimum of 5 years industry experience in Silicon Bring up and Functional Validation. Experience with structured firmware development, verification, and documentation processes. Proficiency in digital logic design, simulation, and debug using Verilog and VCS. Demonstrated experience executing projects from start to completion. Good communication skills for interacting between different design groups and customer support teams

Experience in working on validation of ASIC/SoC products. Knowledge of post-silicon features & functional validation for BSPs and Linux Device Drivers. Knowledge of Test case development & implementation for IP's features. Expertise in protocols/interfaces such as USB, PCIe, I2C, SPI, UART, and Ethernet. Knowledge of Software Development & Testing Life Cycles. Strong knowledge of C, Python, Shell, and Bash Scripting. Strong knowledge of Linux Kernel, Boot-Up Process, Linux-Internals, and System Calls. Understanding of Schematics and PCB board design. Experience with version control software such as GIT. Excellent Communication and learning skills.