8 Dsp Fundamentals Jobs

The people are the culture. We encourage a culture of passion for technology solutions that impact businesses. We also make sure that our people pursue their individual passions. Working with us means you get an in-depth understanding of a range of industries and emerging technologies that help us build solutions that are futuristic and impactful. More importantly, the experience of being at MarvyLogic may help you evolve as a person toward enjoying a more fulfilling life. Minimum BE/BS degree in Electrical/Electronics/Computer science required. At least 5-10 years of logic design and RTL coding experience with sound knowledge on verification and implementation concepts. Experience in physical layer ASIC architecture, micro-architecture development, design and debug. Ability to code readable, maintainable, verifiable and synthesizable logic in Verilog and/or SystemVerilog. Experience with lint, synthesis, CDC, STA, formality, ECO process, tool flows, and scripting. Knowledge in one or more of the following areas, a definite plus: Ethernet (layer 2/3/4 protocols, GMII/XGMII, integration of PHY layer), DSP fundamentals/Filter/FFT design/Datapath design/Error Control Coding, Computer architecture/Processor fundamentals. Preferred Qualifications: Strong knowledge of ASIC design methodologies and flows. Ability to proactively take on responsibilities and competent to work in a start-up environment. Worked with product development companies and having seen at least a couple of tape-outs. Experience with silicon bring-up in the lab and debugging is a definite plus. Experience with FPGA realizations of higher complexity designs. Ability to work with teams spread across geography with excellent communication skills. Responsibilities: Develop key blocks of logic in a next-generation physical layer/mixed signal SOCs. Perform hardware feasibility analysis and come up with a micro-architecture specification helping it map to a high performance, implementable design. Work with verification, DFT, synthesis, circuits, backend implementation teams to realize quality implementation.,

Lekha Wireless is a leading provider of wireless communication technology products and solutions, with its headquarters located in Bengaluru, India. We specialize in developing world-class products utilizing 4G, 5G, and proprietary technologies to meet various Radio Access Network requirements. As a member of our dynamic team, you will be involved in tackling both current and next-generation challenges within the field of wireless communication. Your responsibilities will include working on signal chain implementation for a variety of wireless communication products, designing cores and interfaces to facilitate high-speed data paths, and offering technical leadership in complex design processes. Ideally, you should hold a graduate or post-graduate degree in Electronics, Electrical, Instrumentation, or a related discipline, with 2 to 7 years of experience in the design and development of complex FPGA designs. Key Requirements: - Proficiency in Verilog/VHDL - Strong understanding of FPGA architectures such as RFSoC, Ultrascale, Zynq, and familiarity with STA and electrical interfaces/constraints of FPGAs - Expertise in signal processing, networking, and connectivity IP Cores (e.g., 1G/10G Ethernet, JESD, PCIe, SRIO, Memory cores) - Hands-on experience with Xilinx Vivado tool flow - Sound knowledge of general processor, memory architectures, and embedded peripherals - Understanding of hardware and embedded interfaces for system bring-up - Ability to effectively collaborate with hardware and embedded functions - Strong communication skills in design and debug processes Preferred Skills: - Familiarity with communication signal chains - Previous experience in Wireless communication system and Radio integration - Proficiency in DSP fundamentals Join us at Lekha Wireless to be a part of an innovative team dedicated to pushing the boundaries of wireless communication technology and creating impactful solutions for the future.,

As a Design Verification Engineer, you will be responsible for verifying complex designs such as accelerators, datapath IP, processor core subsystems, and complex interfaces/protocols using leading-edge methodologies like UVM and Formal DV. Your role will involve architecting the testbench, developing the verification environment, and defining test plans, tests, and verification methodology for block/sub-system level verification. You will collaborate with the design team to generate test plans, ensure code and functional coverage closure, integrate block testbenches at the sub-system level UVM environment, and verify integration. Additionally, you will interact with the analog co-simulation and firmware team to enable top-level chip verification aspects. Your responsibilities will also include packaging verification environments for Digital IP for seamless integration into the verification flow at different stages of execution. You will evaluate 3rd party IPs on key qualitative aspects and establish evaluation flows for home-grown and 3rd party IPs for consistent benchmarking of DV evaluation. To excel in this role, you should have a minimum B.E./B.Tech degree in Electrical/Electronics/Computer Science and 7-10+ years of experience in design verification with UVM and constrained random, coverage-based verification approaches. You must possess a strong understanding of DV concepts and the ability to develop scalable DV environment architecture for achieving first-pass DV success. Your adaptability to learn end application/systems and map them into smart verification test plans will be crucial. Excellent debugging and analytical skills, along with good interpersonal, teamwork, and communication skills, are essential for effectively driving discussions with geographically dispersed teams. Knowledge of assertion-based formal verification, standard on-chip interfaces, processor/SoC architecture, and/or DSP fundamentals will be advantageous. Experience with ASIC/SoC product DV and productization is highly desirable for this role.,

Building, coding, and implementing software evaluation test programs. Running test programs to ensure that testing protocols evaluate the software correctly. Tweaking the software testing systems for maximum performance. Required Candidate profile Knowledge of program testing software including Bugzilla and HP LoadRunner. Advanced knowledge of debugging codes and software development languages. Ability to collate data and compile test reports. Perks and benefits Flexible work arrangements. Paid time off.

Building, coding, and implementing software evaluation test programs. Running test programs to ensure that testing protocols evaluate the software correctly. Tweaking the software testing systems for maximum performance. Required Candidate profile Knowledge of program testing software including Bugzilla and HP LoadRunner. Advanced knowledge of debugging codes and software development languages. Ability to collate data and compile test reports. Perks and benefits Flexible work arrangements. Paid time off.

Building, coding, and implementing software evaluation test programs. Running test programs to ensure that testing protocols evaluate the software correctly. Tweaking the software testing systems for maximum performance. Required Candidate profile Knowledge of program testing software including Bugzilla and HP LoadRunner. Advanced knowledge of debugging codes and software development languages. Ability to collate data and compile test reports. Perks and benefits Flexible work arrangements. Paid time off.

Building, coding, and implementing software evaluation test programs. Running test programs to ensure that testing protocols evaluate the software correctly. Tweaking the software testing systems for maximum performance. Required Candidate profile Knowledge of program testing software including Bugzilla and HP LoadRunner. Advanced knowledge of debugging codes and software development languages. Ability to collate data and compile test reports. Perks and benefits Flexible work arrangements. Paid time off.

Building, coding, and implementing software evaluation test programs. Running test programs to ensure that testing protocols evaluate the software correctly. Tweaking the software testing systems for maximum performance. Required Candidate profile Knowledge of program testing software including Bugzilla and HP LoadRunner. Advanced knowledge of debugging codes and software development languages. Ability to collate data and compile test reports. Perks and benefits Flexible work arrangements. Paid time off.