9 Ddr2 Jobs

Role Overview: You will be responsible for implementing control logic state machines and DSP algorithms in FPGA fabric for high throughput systems. Your role will involve troubleshooting and debugging skills for both simulation and in-circuit scenarios. You will also collaborate with the board designer and software team members to ensure optimal pin-out mappings and create, execute, and debug verification tests. Key Responsibilities: - Continual integration of unit modules into FPGA top level - Using SignalTap to debug logic and/or timing issues driven by software functional tests - Constructing bypass, data taps, and data pattern generators for isolation and unit/subsystem - Managing timing...

You have experience in Mixed-Signal layouts and must have worked with TSMC 7nm / 5nm FINFET technology. It is also preferred that you have knowledge of keywords like 22FDX / 12FDX / FDSOI. Your responsibilities will include working on various Mixed-Signal layout blocks such as: - High-speed SerDes like Transmitter(Tx), Receiver(Rx), PLL, USR, LNA, etc. - Analog-to-Digital Converters (ADCs) such as Successive Approximation (SAR) ADC, Delta-sigma () ADC, Dual Slope ADC, Pipelined ADC, Flash ADC. - Digital-to Analog Converters (DACs) including Weighted Resistor DAC, R-2R Ladder DAC. - GPIO, XTAL, Auxiliary cells. - High-speed IOs like DDR2/3/4, MIPI, SATA, USB, LVDS, etc. You should have hands-...

As an FPGA Design and Verification/Validation Engineer at Dexcel Electronics in Bengaluru/Hyderabad, you will be responsible for independently managing the FPGA Design Blocks. Your role will involve working with various Interfaces such as PCIe 2.0, SATA, Fiber Channel, 1G/10G BASE, MII/RMII/GMII/RGMII/SGMII/XAUI, RXAUI, SDI- SD/HD/3G, Display Port, USB, JESD204B, SRIO, MIPI, DDR/LPDDR/DDR2/DDR3, QDR memories. Your key responsibility will include having hands-on experience in Design and Debugging, and working on projects based on FPGAs and SOC. **Key Responsibilities:** - Independently manage the FPGA Design Blocks - Work with various Interfaces such as PCIe 2.0, SATA, Fiber Channel, and more...

As an FPGA Programmer at Electrify Services, you will be a crucial part of our fast-growing engineering services start-up. Your primary responsibility will involve developing FPGA systems by designing the architecture, coding, simulating, and testing. You will play a pivotal role in debugging, troubleshooting, and resolving FPGA-related issues across various processes and projects. Collaborating with cross-functional teams, you will create and maintain documentation of FPGA designs and projects, ensuring high performance and reliability in FPGA designs. Incorporating DSP technology into next-generation video products will be a key aspect of your role, along with working in a System Verilog/U...

As an FPGA Programmer at Electrify Services, you will be a vital part of our team, contributing to the advancement of our client's products and the overall growth of the company. This role offers you the opportunity to work independently while making a significant impact on our organization. We envision this position evolving along with our company's progress. Your responsibilities will include developing FPGA systems through designing architecture, coding, simulation, and testing. You will be tasked with debugging, troubleshooting, and resolving FPGA-related issues across various projects. Collaboration with cross-functional teams to create and maintain documentation of FPGA designs will be...

As a PCB Layout Designer/ CAD Design Engineer with 2+ years of experience in High Speed, Complex Board Layout, and PCB designing, your responsibilities will include having a good understanding of Datasheets, creating Libraries for Complex Logical and Footprints, adhering to IPC Standards for Footprint Creation and Layout processes, and managing the entire PCB Designing flow from Library creation to Gerber release to FAB. Additionally, you will be responsible for setting high-speed constraints and routing, working on High-Speed signal routing, and designing High-speed, Multilayer PCB designs. You should have hands-on experience in Designing High-speed, Multilayer PCB designs, performing DFM c...

As an FPGA Design and Verification/Validation Engineer at Dexcel Electronics in Bengaluru or Hyderabad, you will be responsible for independently overseeing FPGA Design Blocks. You should have a minimum of 2 years of experience in RTL Design, 2 years in IP Verification, 4 years in IP Design/SOC Design, and 6 years in FPGA Design. Your primary task will involve working with various Interfaces such as PCIe 2.0, SATA, Fiber Channel, 1G/10G BASE, MII/RMII/GMII/RGMII/SGMII/XAUI, RXAUI, SDI- SD/HD/3G, Display Port, USB, JESD204B, SRIO, MIPI, DDR/LPDDR/DDR2/DDR3, and QDR memories. Additionally, hands-on experience in Design and Debugging is preferred. You should have prior experience working on pro...

You are an experienced FPGA design engineer with over 3 years of experience, based in Vadodara, India. Your primary responsibility will be implementing control logic state machines and DSP algorithms in FPGA fabric for high throughput systems. You must possess excellent troubleshooting and debugging skills for both simulation and in-circuit scenarios. Your expertise should include continual integration of unit modules into FPGA top-level design, using SignalTap to debug logic and/or timing issues, constructing bypasses, data taps, and data pattern generators for isolation, managing timing closure and constraints files, and creating basic glue logic between DSP blocks. You should also be capa...

Role: Lead Physical Design Engineer COMPANY OVERVIEW: MosChip is a semiconductor and embedded system design company with a focus on Embedded, Turnkey ASICs, Mixed Signal IP, Semiconductor & Product Engineering and IoT solutions catering to Aerospace & Defence, Consumer Electronics, Automotive, Medical and Networking & Telecommunications. Required skills: He/She should be able to do top-level floor planning, PG Planning, partitioning,placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. He/She...