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7.0 - 12.0 years
0 Lacs
bengaluru, karnataka, india
On-site
Lead Design Engineer As an RTL Design Lead , you will play a critical role in leading the RTL design and verification process for complex digital designs . You will manage a team of RTL engineers , collaborate with cross-functional teams, and ensure the successful implementation of high-performance, low-power designs. The ideal candidate should have a strong technical background in RTL design , experience in digital design flow , and the ability to lead a team towards the successful execution of complex projects. Key Responsibilities: RTL Architecture and Design: Lead the RTL design of complex digital systems, including microprocessors , ASICs , FPGA designs , and system-on-chip (SoC) compon...
Posted 2 days ago
4.0 - 8.0 years
3 - 12 Lacs
bengaluru, karnataka, india
On-site
Main responsibilities : Acquire knowledge of the architecture and microarchitecture of the ASIC by studying specifications and interacting with the architecture and logical design teams. Participate in defining overall verification strategies and methodologies, and the required simulation environments. Develop, maintain and publish verification specifications. Write and perform closely test plans with the logical design team. Develop coverage models and verification environments using UVM-SystemVerilog / C ++ Monitor, analyze and debug simulation errors. Monitor and analyze simulation coverage results to improve tests accordingly thereby achieving coverage targets on time. Submit recommendat...
Posted 2 weeks ago
4.0 - 8.0 years
3 - 8 Lacs
noida, uttar pradesh, india
On-site
The candidate would be part of the VIP group responsible for development of Verification IPs. Core responsibilities would include Designing and developing the VIP/Test-bench, Creating Verification plans, Coding sequences/Test-scenarios, Coverage driven verification. The responsibility would also include enhancement of the existing Verification IP products and interface with customers during VIP deployment. This is an opportunity to work with best-in-class verification, debug tools, Design IP & close collaboration with best protocol experts in the industry. You will work with highly professional and motivated colleagues who value and support your contribution. Requirements: Bachelors/masters ...
Posted 1 month ago
12.0 - 17.0 years
12 - 17 Lacs
Bengaluru / Bangalore, Karnataka, India
On-site
What You ll Be Doing: Making architectural decisions on test bench design. Writing verification plans and specifications. Implementing test bench infrastructure and writing test cases. Implementing a coverage-driven methodology. Leading technical aspects of verification projects. Collaborating with international teams of architects, designers, and verification engineers. The Impact You Will Have: Enhancing the robustness and reliability of IP cores used in critical applications. Driving innovation in verification methodologies and tools. Ensuring high-quality deliverables through rigorous verification processes. Improving productivity, performance, and throughput of verification solutions. C...
Posted 4 months ago
5.0 - 10.0 years
4 - 14 Lacs
Bengaluru / Bangalore, Karnataka, India
On-site
Requirements: Bachelors/masters with good academic record. 5+ years experience in developing HVL based verification environments, preferably using System Verilog. Exposure to coverage driven verification. Experience in verification methodologies like UVM/OVM. Exposure to complex SV test benches involving multiple protocols and VIPs. Experience in VIP development is highly desirable. Should have a work exposure on any of the industry standard protocols like Jedec UFS, MIPI Unipro, MIPI MPHY, PCIe, USB, Ethernet, etc. Demonstrates good analysis and problem-solving skills. Have a strong passion for work and driving things to closure. Leadership qualities to motivate and align team members towar...
Posted 4 months ago
5.0 - 10.0 years
5 - 10 Lacs
Bengaluru / Bangalore, Karnataka, India
On-site
You Are: A highly-skilled ASIC Digital Verification Engineer with a passion for developing functional verification solutions for RTL based IP Cores You are experienced in handling complex protocols and thrive in a collaborative international environment With over 15 years of experience, you possess a deep understanding of verification methodologies and are proficient in SystemVerilog (SV) and Universal Verification Methodology (UVM) You are adept at making architectural decisions, implementing test benches, and driving innovation in verification solutions You are a proactive team player with excellent communication and problem-solving skills, ready to contribute to cutting-edge projects in A...
Posted 4 months ago
7.0 - 9.0 years
3 - 9 Lacs
Noida, Uttar Pradesh, India
On-site
The candidate would be part of the VIP group responsible for development of Verification IPs. Core responsibilities would include Designing and developing the VIP/Test-bench, Creating Verification plans, Coding sequences/Test-scenarios, Coverage driven verification. The responsibility would also include enhancement of the existing Verification IP products and interface with customers during VIP deployment. This is an opportunity to work with best-in-class verification, debug tools, Design IP & close collaboration with best protocol experts in the industry. You will work with highly professional and motivated colleagues who value and support your contribution. Requirements: Bachelors/masters ...
Posted 4 months ago
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