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Sr Staff Verification Engineer Renesas

0.0 - 1.0 years

3 - 4 Lacs

hyderabad, telangana, india

On-site

Key Responsibilities Lead and execute IP and SoC-level verification using UVM/SystemVerilog methodologies Develop scalable testbenches and environments aligned with project verification goals Define and drive coverage-driven and assertion-based verification strategies Debug complex simulation failures at the testbench and RTL level Integrate verification IPs and ensure protocol compliance for interfaces like DDR5, HBM3, PCIe Gen6, CXL 3.0 Collaborate with architecture, design, firmware/software, and system validation teams Drive early software validation with virtual prototypes and emulation platforms Work on power-aware and DFT verification flows where applicable

Posted 3 days ago

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