7.0 - 11.0 years

0 Lacs

karnataka

On-site

As a Physical Design Engineer at HCLTech, you will be responsible for performing Timing analysis, timing convergence, SI/Noise analysis, and ensuring Signoff quality in the designs. With a minimum of 7 years of experience, you will demonstrate proficiency in handling multi-voltage scenarios design and STA closure on Low power designs. Your familiarity with industry standard EDA tools like Primetime will be essential for success in this role. Hands-on experience in Physical Design implementation will be a valuable asset. You will be expected to utilize your skills in scripting languages such as Perl and Tcl for automation purposes. Knowledge of 16/14/10/7/5nm nodes, along with an understanding of computer organization/architecture, will be advantageous. Your strong problem-solving abilities and attention to detail will be critical in this position. Effective communication skills and the ability to collaborate across diverse teams are essential qualities we are looking for in our ideal candidate. This challenging opportunity in Physical Design Engineering at HCLTech offers a platform to showcase your talents and contribute to cutting-edge projects. If you meet the above requirements and are excited about this opportunity, please send your resumes to maheswari.od@hcltech.com with the following details: CTC - ECTC - NP - Current Location - Preferred Location - Availability for F2F discussion on Saturday (9-Aug-2025) - Yes / No Join us at HCLTech and be part of our dynamic team working on full-chip timing and engineering projects. #EngineeringJobs #fullchiptiming,

Posted 1 week ago

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GFX - Performance Verification Lead AMD

10.0 - 14.0 years

0 Lacs

karnataka

On-site

As an SMTS Silicon Design Engineer at AMD, you will play a crucial role in advancing next-generation computing experiences through the development of cutting-edge products. Your responsibilities will include creating feature-based performance test plans, writing tests, conducting performance verification, achieving architectural model closure, and closing RTL designs. Additionally, you will need to demonstrate expertise in shader development, driver workload analysis, benchmarking, microarchitecture development, and GEMM kernel debugging. Your strong skills in SV/C-C++ based BFM development and memory modeling will be essential for success in this role. To excel in this position, you must have a Bachelor's degree with at least 12 years of experience or a Master's degree with at least 10 years of experience. A deep understanding of Graphics Architecture, excellent IP-level debug skills for compute and 3D, and proficiency in advanced verification methodologies and languages such as C/C++, UVM, and SystemVerilog are required. Experience with scripting languages like Python and Perl, as well as tools like Emupower, Prime Time, and Power Artist, is also necessary. Familiarity with formal property-based verification, latency pipeline analysis, and performance bottleneck identification will be advantageous. Furthermore, you should possess a solid understanding of memory hierarchies, caches, address translation schemes, and general DRAM technologies. Knowledge of computer organization/architecture, strong analytical and problem-solving skills, and attention to detail are essential for success in this role. As a self-starter, you must be able to drive tasks independently to completion while also collaborating effectively with cross-functional teams. Strong leadership, innovation, and communication skills are key attributes that will contribute to your success in this role. In addition to your technical qualifications, you are required to hold a B.E/B.Tech or M.E/M.Tech degree in ECE/Electrical Engineering with a focus on Digital Systems/VLSI. A flair for market development and innovation in the graphics industry will be beneficial for this role. Join us at AMD and be a part of a culture that values innovation, excellence, and collaboration. Together, we can advance the boundaries of technology and make a meaningful impact on the world.,

Posted 3 weeks ago

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