ASIC Digital Verification Engineer Synopsys

1.0 - 5.0 years

0 Lacs

karnataka

On-site

You are a driven and meticulous ASIC Digital Verification Engineer, keen to make a significant impact in the semiconductor industry. You possess a strong foundation in digital verification methodologies and have a keen eye for detail. With a collaborative spirit, you thrive in a team environment while also excelling when working independently. Your communication skills are top-notch, allowing you to articulate complex technical concepts with ease. You are passionate about innovation and are always looking for ways to improve processes and outcomes. Your proficiency in UVM and SystemVerilog, combined with your programming skills in languages such as C, TCL, Perl, or Python, positions you as a valuable asset to any team. You are committed to driving productivity, performance, and throughput through advanced verification solutions. Your experience in assertion verification, coverage analysis, and protocol-oriented performance analysis demonstrates your capability to handle complex verification tasks. Fluent in English, you are ready to contribute to a dynamic and forward-thinking team. Writing comprehensive verification plans and specifications. Making critical architecture decisions on test bench design. Implementing test bench infrastructure and developing test cases. Utilizing a coverage-driven methodology for verification. Collaborating with architects, designers, and other verification team members globally. Ensuring the interoperability between DDR digital controllers and mixed-signal PHYs. Enhancing the reliability and performance of digital IP solutions. Contributing to the successful delivery of digital IP to the semiconductor industry. Driving innovation in verification methodologies and processes. Ensuring high-quality IP products that meet customer requirements. Improving the efficiency and effectiveness of the verification process. Supporting the development of cutting-edge technologies in the Era of Smart Everything. BS/MS degree with a minimum of 1 year of related experience. Proficiency in UVM and SystemVerilog. Programming skills in C, TCL, Perl, or Python. Experience with assertion verification, coverage analysis, and protocol-oriented performance analysis. Strong object-oriented coding and verification skills. Detail-oriented and precise. Innovative and proactive in your approach. Excellent communicator, both written and verbal. Team player with a collaborative mindset. Independent and capable of driving tasks to completion.,

Posted 1 week ago

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